BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//CERN//INDICO//EN
BEGIN:VEVENT
SUMMARY:KEYNOTE 7: A Pivot of HPC towards Memory-Centric Computers for AI
DTSTART;VALUE=DATE-TIME:20211203T143000Z
DTEND;VALUE=DATE-TIME:20211203T153000Z
DTSTAMP;VALUE=DATE-TIME:20260511T021934Z
UID:indico-contribution-1535@events.chpc.ac.za
DESCRIPTION:Speakers: Thomas Sterling (Indiana University)\nThroughout the
  rapid evolution of HPC driven by technology advances reflected by Moore
 ’s Law\, processor core architecture has dominated computer design acros
 s ten orders (or more) of magnitude in delivered performance. But with the
  achievement of nanoscale device technology\, exponential gain has stagnat
 ed demanding alternative innovative strategies. Concurrently\, workloads h
 ave pivoted from linear algebra to artificial intelligence (AI) with empha
 sis on supervised machine learning (ML) applications. To address these com
 bined challenges\, transformative architectures are being explored that ar
 e memory-centric\, embody data-oriented semantics\, and optimize for laten
 cy and bandwidth rather than FPU utilization. This closing Keynote address
  will describe a class of non von Neumann architectures that will accelera
 te dynamic graph processing across highly scalable computing systems beyon
 d Exascale through to the end of this decade. A brief discussion of early 
 attempts of memory-centric computing such as SIMD and PIM will motivate re
 volutionary concepts of the future. Questions from the audience will be we
 lcome assuming remote communication technology permits.\n\nhttps://events.
 chpc.ac.za/event/98/contributions/1535/
LOCATION:
URL:https://events.chpc.ac.za/event/98/contributions/1535/
END:VEVENT
END:VCALENDAR